Description

The Sanitas EG SD Card Controller IP Core implements a VHDL Secure Digital Memory Card controller, exploiting the SPI interface of the SD Card. It is designed to transfer data in blocks of 512 bytes from and to a Secure Digital Memory Card.

Strength points of the implemented solution are the technology independence and the reduced resource occupation.

The following operations are supported by the IP Core:

  • Single Read : read a 512-byte block
  • Single Write: write a 512-byte block
  • Suspend read operation and restart
  • SD card identification register read

The Core is a fully synchronous design.

An additional VHDL module is available for applications which need higher performance on reading operations.
This SD Card reader exploits configurable DMA accesses to retrieve the data stored in the SD memory.

Key features
  • Secure Digital (SD) card Controller IP core
  • SPI interface implementation
  • Single-read /single write (512-byte block)
  • Technology independence
  • Optional DMA access to improve reading performance
Architecture

The Core architecture is based on a finite state machine which implements the needed SD Card initialization steps and the supported operations. The core is synchronous: the core clock signal frequency is twice the SPI clock one. An additional module is available to realize an SD card reader exploiting DMA accesses. Its architecture is based on two a wishbone bus interfaces: a slave interface to write the registers needed to configure the desired DMA accesses, and a master-slave interface to retrieve stored data from the SD card and make them available on the wishbone itself.

Core version

The current IP core version is 1.1

Performance

The SPI specification requires a 25 MHz Clock: the following families have been successfully tested in order to check the timing requirement compliance.

 

Device SPI Clock Frequency
ECP5-LFE5U-6 > 25 MHz
MachXO2-LCMXO2-4 > 25 MHz
ARTIX7-XC7A200-3 > 25 MHz
KINTEX7-XC7K70-3 > 25 MHz
Resource usage

The resource usage is listed for the same devices considered in the performance table considering two configurations, SD controller module or the complete SD card reader(*)

 

Sd Reader Sd Controller Only
Device LUT FF BRAM LUT FF BRAM
ECP5-LFE5U-6 781 504 0 405 213 0
MachXO2-LCMXO2-4 853 545 0 407 213 0
ARTIX7-XC7A100-3 562 522 0 261 188 0
KINTEX7-XC7K70-3 565 522 0 261 188 0

(*) Both performance and resources are calculated adopting following design tool versions: Lattice Diamond 3.10, Xilinx Vivado 2016.2

 

Sanitas EG reserves the right to change specification without notice.