Project Info
The iTPM ADFE (italian Tile Processor Module Analog to Digital Front-End) 1.6 is responsible for Analog to Digital conversion and pre-processing of a 32-channel source
Description
The iTPM ADFE (italian Tile Processor Module Analog to Digital Front-End) 1.6 is responsible for Analog to Digital conversion and pre-processing of a multi-channel source managing up to 32 analog inputs with sampling frequencies from 700MHz up to 1GHz (32 8/12-bit channels are supported).
It is the natural evolution of the initial iTPM ADFE and provides basically the same functionalities, with additional memory, exploiting faster ADCs and more powerful technologies that allows to remarkably reduce the power consumption.
Best in class 14-bit AD converters, recent 16nm FPGA, 40Gbit Ethernet optical links have been selected focusing on the best commercial compromise between quality, performance and power consumption. Compact board size, low noise clock network, advanced 14-layer board build-up, Ethernet based management features (including health monitoring capability), high efficiency and low noise power distribution system complete the main board features.
Accurate board design allow an High Density RF interface with superior performances with high linearity, low interference between channels to meet really challenging requirements.
The board has been developed in collaboration with INAF and Oxford University in the frame of the Square Kilometer Array (SKA) international project, and is used within the antenna receiver module of the radio telescope. The beamforming technique is successfully adopted in the directional signal reception, thanks to this powerful board.
This new board version can be used standalone thanks to the optional 1U pizza box, that includes the needed power supplies and fans. A rendering of the pizza box is shown below.
Different and flexible commercial solutions are available to fulfill Customer’s needs: Sanitas can provide the iTPM ADFE board, with or without the pizza box, allowing the Customer to develop his own FW and SW application. Alternatively the Customer can choose to exploit Sanitas developers expertise to implement a custom application FW including DSP processing features similar to the ones developed for SKA project: channellization, beamforming, high speed processing. Additionally, if required, Sanitas can provide the server side SW for both controlling and acquiring data from the iTPM boards at high speed.
Key Features
- 32 RF input@1Gsps, 50Ohm
- Analog Devices AD9695, 14-bit high performance ADCs
- Digital beamforming
- 50MHz – 650MHz optimized for SKA analog band, ADC and board capabilities up to 2GHz
- Maximum Sampling Rate 1.25GHz
- Channel isolation > 60 dB
- ENOB > 7.89 with 8-bit channels configuration
- JESD204B Subclass 1, 2×16 lines
- Management MCU, ARM Cortex-M0â„¢
- 2 Xilinx UltraScale+ XCKU9P FPGAs
- Compact size, 6U format compatible
- Availability of optional 1U pizza box for standalone board usage (power supplies and fans included)
- 2x 40G Ethernet interfaces(QSFP)
- 2x 64-bit DDR4-1600
- Management instant ON Lattice CPLD with Ethernet Gigabit Link
- System Monitor
- 256Mbit SPI on board FLASH for multiple FPGA configuration
- High efficient Power Distribution System, single input DC supply
- 64 Watt with all the components switched on and configured (32 ADCs @800MHz, FPGA transmitting data over Gigabit Ethernet)
Board Technical Specifications and Characteristics
Thanks to the JESD204B interface all the ADs are source synchronous and can be phase aligned with a 10 MHz external reference and PPS. Two identical FPGAs interface eight dual channel ADs with JESD204B, 16 lines available for each FPGA, 2 lines for each AD, 64-bit DDR4 memory and a 40G Ethernet interface with a QSFP+ connector. A management CPLD is present with a dedicated Ethernet Gigabit link for loading firmware and monitoring temperature and voltage over 40 internal points.
Component Description | Component |
Management CPLD | Lattice Semiconductor LCMXO3L-9400E |
Management FLASH | 2x 256Mbit SPI |
Management MCU | ATSAMD21J18A |
FPGA | 2x Xilinx XCKU9P-1FFVE900E |
FPGA Memory | 2x 4GByte DDR4-1600(*) |
Analog to Digital Converter | 16x Analog Devices AD9695BCPZ-1300 |
Front Panel Connectors | 2x QSFP |
SMA, external 10Mhz reference | |
SMA, PPS | |
Input Supply | |
RJ45 Gigabit | |
RF INPUT Connectors & GPIO | 4x ISORATE IP5 08 |
2x ERF8 010 | |
Internal GPIO | 2 x 2 GPIO |
Debug Connector | FPGA JTAG |
Power Supply | 12-24 VDC |
Power Consumption | 64 Watt with all the components switched on and configured (32 ADCs @800MHz, FPGA transmitting data over Gigabit Ethernet) |
Working Temperature | +5°C / +55°C |
Board size | 233 mm x 170mm x 31mm |
(*) Upgradable to 2x 16GByte DDR4-2400
Sanitas EG reserves the right to change specifications without notice