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Linear Edge Detection
The IP integrates the state of the art algorithms with noise suppression and speed optimization functions. Two alternative algorithms are available, inflection midpoint and center of mass. Edge position is…
10G/40G UDP Subsystem
The core provides an effective infrastructure to implement very high-speed communication between an FPGA and one or several network devices, providing up to 40Gbit/s transfer rate over Ethernet. It provides…
iTPM ADFE 1.6 Multi-Channel Digital Beamformer
The iTPM ADFE (italian Tile Processor Module Analog to Digital Front-End) 1.6 is responsible for Analog to Digital conversion and pre-processing of a multi-channel source managing up to 32 analog…
Video Rotation 90
This core is aimed at optimizing both performance and resource usage: it is designed focusing on the memory block number reductions, while the specific functionality implemented is really eager of…
HP-DDR3 Controller
This core is aimed at optimizing both performance and resource usage: it is designed focusing on the logic level reduction. The controller adapts the execution of memory access commands in…
SD Card Controller
The Sanitas EG SD Card Controller IP Core implements a VHDL Secure Digital Memory Card controller, exploiting the SPI interface of the SD Card. It is designed to transfer data…
iTPM ADFE Multi-Channel Digital Beamformer
The iTPM ADFE (italian Tile Processor Module Analog to Digital Front-End) is responsible for Analog to Digital conversion and pre-processing of a multi-channel source, managing up to 32 analog inputs…
uAES128
Strength points of the implemented solution are the technology independence and the reduced resource occupation: the core is really compact, taking also advantage of embedded block RAMs. The following operations…
INVENTAMI
It can be used either as a general purpose prototyping board or as an embedded SBC: its features and the computational power of the CPU together with the unlimited flexibility…